Cypress CY62158EV30 Manual do Utilizador descarregar pdf (Página 14)

14 September 5, 2010

assignments that are supported by the 0.1” jumpers and PCB routing. The LM3S9B96 has

additional internal multiplexing that enables additional configurations which may require discrete

wiring between peripherals and GPIO pins.

The ICDI section of the board has a GND-GND jumper that serves no function other than to

provide a convenient place to ‘park’ a spare jumper. This jumper may be reused as required.

Figure 2-1. Factory Default Jumper Settings

Clocking

The development board uses a 16.0-MHz (Y2) crystal to complete the LM3S9B96

microcontroller's main internal clock circuit. An internal PLL, configured in software, multiples this

clock to higher frequencies for core and peripheral timing.

A 25.0-MHz (Y1) crystal provides an accurate timebase for the Ethernet PHY.

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