Cypress CY7C1041DV33 Manual do Utilizador descarregar pdf (Página 7)

CY7C1041DV33

Document #: 38-05473 Rev. *E Page 7 of 13

Figure 5. Read Cycle No. 2 (OE Controlled)

[17, 18]

Figure 6. Write Cycle No. 1 (CE Controlled)

[19, 20]

Switching Waveforms (continued)

50%

DATA VALID

ACE

DOE

LZOE

LZCE

HIGH IMPEDANCE

HZOE

HZBE

HIGH

ICC

ISB

IMPEDANCE

ADDRESS

DATA OUT

SUPPLY

DBE

LZBE

HZCE

BHE, BLE

CURRENT

SCE

PWE

DATAIO

ADDRESS

BHE, BLE

Notes

18. Address valid prior to or coincident with CE

transition LOW.

19. Data IO is high impedance if OE

or BHE and BLE = V

IH.

20. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.

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Cypress CY7C1041DV33 Manual do Utilizador Página 7