Cypress CY7C1333H Manual do Utilizador Página 1

PRELIMINARY2-Mbit (64K x 32) Flow-Through SRAMwith NoBL™ ArchitectureCY7C1333HCypress Semiconductor Corporation • 3901 North First Street • San Jose,

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 10 of 12NOP, STALL and DESELECT Cycles[18, 19, 21]ZZ Mode Timing[22, 23]Switching Waveforms (c

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 11 of 12© Cypress Semiconductor Corporation, 2004. The information contained herein is subject

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 12 of 12Document History PageDocument Title: CY7C1333H 2-Mbit (64K x 32) Flow-Through SRAM with

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 2 of 12 Selection GuideCY7C1333H-133 CY7C1333H-100 UnitMaximum Access Time 6.5 8.0 nsMaximum O

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 3 of 12Pin Definitions (100-pin TQFP Package) Name I/O DescriptionA0, A1, A Input-SynchronousAd

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 4 of 12Functional OverviewThe CY7C1333H is a synchronous flow-through burst SRAMdesigned specif

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 5 of 12 Linear Burst Address Table (MODE = GND)First AddressA1, A0SecondAddressA1, A0Third Add

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 6 of 12Truth Table for Read/Write[2, 3]FunctionWEBWABWBBWCBWDRead HXXXXWrite No Bytes Written L

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 7 of 12Maximum Ratings(Above which the useful life may be impaired. For user guide-lines, not t

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 8 of 12Capacitance[11]Parameter Description Test Conditions 100 TQFP Package UnitCINInput Capac

PRELIMINARYCY7C1333HDocument #: 001-00209 Rev. ** Page 9 of 12Hold TimestAHAddress Hold after CLK Rise 0.5 0.5 nstALHADV/LD Hold after CLK Rise 0.5 0.