Cypress CY14B256L Manual do Utilizador descarregar pdf (Página 6)

CY14B256L

Document Number: 001-06422 Rev. *H Page 6 of 18

Table 1. Hardware Mode Selection

CE WE OE

– A

Mode IO Power

H X X X Not Selected Output High Z Standby

L H L X Read SRAM Output Data Active

L L X X Write SRAM Input Data Active

LHL0x0E38

0x31C7

0x03E0

0x3C1F

0x303F

0x03F8

Read SRAM

AutoStore Disable

Output Data

Active

[1, 2, 3]

LHL0x0E38

0x31C7

0x03E0

0x3C1F

0x303F

0x07F0

Read SRAM

AutoStore Enable

Output Data

Active

[1, 2, 3]

LHL0x0E38

0x31C7

0x03E0

0x3C1F

0x303F

0x0FC0

Read SRAM

Nonvolatile Store

Output Data

Output High Z

Active I

CC2

[1, 2, 3]

LHL0x0E38

0x31C7

0x03E0

0x3C1F

0x303F

0x0C63

Read SRAM

Nonvolatile Recall

Output Data

Output High Z

Active

[1, 2, 3]

Notes

1. The six consecutive address locations are in the order listed. WE

is HIGH during all six cycles to enable a nonvolatile cycle.

2. While there are 15 address lines on the CY14B256L, only the lower 14 lines are used to control software modes.

3. IO state depends on the state of OE

. The IO table shown is based on OE Low.

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