Cypress STK22C48 Manual do Utilizador descarregar pdf

STK22C48

16 Kbit (2K x 8) AutoStore nvSRAM

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Document Number: 001-51000 Rev. ** Revised January 30, 2009

Features

■ 25 ns and 45 ns access times

■ Hands off automatic STORE on power down with external 68

µF capacitor

■ STORE to QuantumTrap™ nonvolatile elements is initiated by

software, hardware, or AutoStore™ on power down

■ RECALL to SRAM initiated by software or power up

■ Unlimited Read, Write, and Recall cycles

■ 1,000,000 STORE cycles to QuantumTrap

■ 100 year data retention to QuantumTrap

■ Single 5V+10% operation

■ Commercial and industrial temperatures

■ 28-pin 300 mil and (330 mil) SOIC package

■ RoHS compliance

Functional Description

The Cypress STK22C48 is a fast static RAM with a nonvolatile

element in each memory cell. The embedded nonvolatile

elements incorporate QuantumTrap technology producing the

world’s most reliable nonvolatile memory. The SRAM provides

unlimited read and write cycles, while independent nonvolatile

data resides in the highly reliable QuantumTrap cell. Data

transfers from the SRAM to the nonvolatile elements (the

STORE operation) takes place automatically at power down. On

power up, data is restored to the SRAM (the RECALL operation)

from the nonvolatile memory. A hardware STORE is initiated with

the HSB

pin.

STORE/

RECALL

CONTROL

POWER

CONTROL

STATIC RAM

ARRAY

32 X 512

Quantum Trap

32 X 512

STORE

RECALL

COLUMN I/O

COLUMN DEC

ROW DECODER

INPUT BUFFERS

HSB

CAP

Logic Block Diagram

[+] Feedback

1 2 3 4 5 6 ... 13 14

Resumo do Conteúdo

Página 1 - STK22C48

STK22C4816 Kbit (2K x 8) AutoStore nvSRAMCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document Numbe

Página 2

STK22C48Document Number: 001-51000 Rev. ** Page 10 of 14AutoStore or Power Up RECALLParameter Alt DescriptionSTK22C48UnitMin MaxtHRECALL [12]tRESTORE

Página 3

STK22C48Document Number: 001-51000 Rev. ** Page 11 of 14Hardware STORE CycleParameter Alt DescriptionSTK22C48UnitMin MaxtDHSB [13, 16]tRECOVER, tHHQXH

Página 4

STK22C48Document Number: 001-51000 Rev. ** Page 12 of 14Ordering InformationSpeed (ns) Ordering Code Package Diagram Package Type Operating Range25 ST

Página 5

STK22C48Document Number: 001-51000 Rev. ** Page 13 of 14Package DiagramsFigure 13. 28-Pin (300 mil) SOIC (51-85026)Figure 14. 28-Pin (330 mil) SOIC

Página 6

Document Number: 001-51000 Rev. ** Revised January 30, 2009 Page 14 of 14AutoStore and QuantumTrap are registered trademarks of Cypress Semiconductor

Página 7

STK22C48Document Number: 001-51000 Rev. ** Page 2 of 14Pin ConfigurationsFigure 1. Pin Diagram - 28-Pin SOICTable 1. Pin DefinitionsPin Name Alt IO

Página 8 - SRAM Read Cycle

STK22C48Document Number: 001-51000 Rev. ** Page 3 of 14Device OperationThe STK22C48 nvSRAM is made up of two functional compo-nents paired in the same

Página 9 - SRAM Write Cycle

STK22C48Document Number: 001-51000 Rev. ** Page 4 of 14Figure 3. AutoStore Inhibit ModeHardware STORE (HSB) OperationThe STK22C48 provides the HSB pi

Página 10 - HRECALL

STK22C48Document Number: 001-51000 Rev. ** Page 5 of 14Preventing StoreThe STORE function is disabled by holding HSB high with adriver capable of sour

Página 11

STK22C48Document Number: 001-51000 Rev. ** Page 6 of 14Maximum RatingsExceeding maximum ratings may shorten the useful life of thedevice. These user g

Página 12

STK22C48Document Number: 001-51000 Rev. ** Page 7 of 14CapacitanceIn the following table, the capacitance parameters are listed.[5]Parameter Descripti

Página 13

STK22C48Document Number: 001-51000 Rev. ** Page 8 of 14AC Switching Characteristics SRAM Read CycleParameterDescription25 ns 45 ns UnitMin Max Min Ma

Página 14 - PSoC Solutions

STK22C48Document Number: 001-51000 Rev. ** Page 9 of 14SRAM Write CycleParameterDescription25 ns 45 ns UnitMin Max Min MaxCypressParameterAlttWCtAVAV