Cypress enCoRe CY7C63310 Manual do Utilizador descarregar pdf (Página 20)

CY7C63310, CY7C638xx

Document 38-08035 Rev. *K Page 20 of 83

Figure 10-1. Clock Block Diagram

CPU_CLK

EXT

24 MHz

MUX

CLK_USB

SEL SCALE

CLK_24MHz

CLK_EXT

CPUCLK

SEL

MUX

SCALE (divide by 2

n

,

n = 0-5,7)

CLK_32

KHz

LP OSC

32 KHz

SEL

SCALE

OUT

0X

12 MHz

0X

12 MHz

1

1

EXT/2

11

EXT

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