Cypress CY7C028V Manual do Utilizador descarregar pdf (Página 13)

CY7C027V/027VN/027AV/028V

CY7C037V/037AV/038V

Document #: 38-06078 Rev. *B Page 13 of 18

Note

34. If t

is violated, the busy signal is asserted on one side or the other, but there is no guarantee to which side BUSY is asserted.

Switching Waveforms

(continued)

ADDRESS MATCH

BLC

BHC

ADDRESS MATCH

BLC

BHC

Valid First:

ADDRESS

L,R

BUSY

ADDRESS

L,R

Figure 13. Busy Timing Diagram No. 1 (CE Arbitration)

[34]

Valid First:

ADDRESS MATCH

ADDRESS

BUSY

ADDRESS MISMATCH

or t

BLA

BHA

ADDRESS

ADDRESS MATCH ADDRESS MISMATCH

ADDRESS

BUSY

or t

BLA

BHA

ADDRESS

Right AddressValid First:

Figure 14. Busy Timing Diagram No. 2 (Address Arbitration)

[34]

Left Address Valid First:

[+] Feedback

1 2 ... 8 9 10 11 12 13 14 15 16 17 18

CY7C027V/027VN/027AV/028V 1
CY7C037V/037AV/038V 1
CY7C028V (64K x 16) 2
CY7C037V/037AV (32K x 18) 3
CY7C038V (64K x 18) 3

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