Cypress CY62147DV30 Manual do Utilizador Página 1

4-Mbit (256K x 16) Static RAMCY62147DV30Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document #: 38

CY62147DV30Document #: 38-05340 Rev. *F Page 10 of 12 Package DiagramA1A1 CORNER0.750.75Ø0.30±0.05(48X)Ø0.25 M C A BØ0.05 M CBA0.15(4X)0.21±0.051.00

CY62147DV30Document #: 38-05340 Rev. *F Page 11 of 12© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to chang

CY62147DV30Document #: 38-05340 Rev. *F Page 12 of 12Document History PageDocument Title:CY62147DV30 MoBL® 4-Mbit (256K x 16) Static RAMDocument Numb

CY62147DV30Document #: 38-05340 Rev. *F Page 2 of 12 Notes: 2. NC pins are not internally connected on the die.3. DNU pins have to be left floating o

CY62147DV30Document #: 38-05340 Rev. *F Page 3 of 12Maximum Ratings(Above which the useful life may be impaired. For user guide-lines, not tested.)St

CY62147DV30Document #: 38-05340 Rev. *F Page 4 of 12 Notes: 10.Tested initially and after any design or process changes that may affect these paramet

CY62147DV30Document #: 38-05340 Rev. *F Page 5 of 12Switching Characteristics Over the Operating Range[14] Parameter Description45 ns[11]55 ns 70 nsU

CY62147DV30Document #: 38-05340 Rev. *F Page 6 of 12Switching WaveformsRead Cycle 1 (Address Transition Controlled)[18, 19]Read Cycle No. 2 (OE Contr

CY62147DV30Document #: 38-05340 Rev. *F Page 7 of 12Write Cycle No. 1 (WE Controlled)[17, 21, 22]Write Cycle No. 2 (CE Controlled)[17, 21, 22]Notes:

CY62147DV30Document #: 38-05340 Rev. *F Page 8 of 12Write Cycle No. 3 (WE Controlled, OE LOW)[22]Write Cycle No. 4 (BHE/BLE Controlled, OE LOW)[22]Sw

CY62147DV30Document #: 38-05340 Rev. *F Page 9 of 12 Truth TableCE WE OE BHE BLE Inputs/Outputs Mode PowerH X X X X High Z Deselect/Power-Down Standb