Cypress CY8C24094 Manual do Utilizador

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CY8C24094, CY8C24794
CY8C24894, CY8C24994
PSoC
®
Programmable System-on-Chip™
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 38-12018 Rev. *M Revised February 10, 2009
1. Features
XRES Pin to Support In-System Serial Programming (ISSP)
and External Reset Control in CY8C24894
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
Two 8x8 Multiply, 32-Bit Accumulate
Low Power at High Speed
3V to 5.25V Operating Voltage
Industrial Temperature Range: -40°C to +85°C
USB Temperature Range: -10°C to +85°C
Advanced Peripherals (PSoC
®
Blocks)
6 Rail-to-Rail Analog PSoC Blocks Provide:
Up to 14-Bit ADCs
Up to 9-Bit DACs
Programmable Gain Amplifiers
Programmable Filters and Comparators
4 Digital PSoC Blocks Provide:
8 to 32-Bit Timers, Counters, and PWMs
CRC and PRS Modules
Full-Duplex UART
Multiple SPI Masters or Slaves
Connectable to all GPI/O Pins
Complex Peripherals by Combining Blocks
Capacitive Sensing Application Capability
Full Speed USB (12 Mbps)
Four Uni-Directional Endpoints
One Bi-Directional Control Endpoint
USB 2.0 Compliant
Dedicated 256 Byte Buffer
No External Crystal Required
Flexible On-Chip Memory
16K Flash Program Storage 50,000 Erase and Write Cycles
1K SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Programmable Pin Configurations
25 mA Sink, 10 mA Drive on all GPI/O
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on all GPI/O
Up to 48 Analog Inputs on GPI/O
Two 33 mA Analog Outputs on GPI/O
Configurable Interrupt on all GPI/O
Precision, Programmable Clocking
Internal ±4% 24 and 48 MHz Oscillator
Internal Oscillator for Watchdog and Sleep
0.25% Accuracy for USB with no External Components
Additional System Resources
I
2
C Slave, Master, and Multi-Master to 400 kHz
Watchdog and Sleep Timers
User Configurable Low Voltage Detection
DIGITAL SYSTEM
SRAM
1K
In te rru p t
C o n tro lle r
Sleep and
W atchdog
Clock Sources
(Includes IM O and ILO )
Global Digital Interconnect
Global Analog Interconnect
PSoC CORE
CPU Core (M8C)
SROM Flash 16K
Digital
Block
Array
Digital
Clocks
SYSTEM RESOURCES
ANALOG SYSTEM
Analog
Ref.
Port 5 Port 4 Port 3 Port 2 Port 1 Port 0
Analog
Drivers
Analog
Block
Array
In te rn a l
Voltage
Ref.
POR and LVD
System R esets
2
MACs
Decimator
Type 2
I2 C USB
Port 7
S
y
s
t
e
m
B
u
s
Analog
Input
Muxing
2. Logic Block Diagram
[+] Feedback
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Resumo do Conteúdo

Página 1 - Programmable System-on-Chip™

CY8C24094, CY8C24794CY8C24894, CY8C24994PSoC® Programmable System-on-Chip™Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-

Página 2

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 10 of 478.1 68-Pin Part Pinout The 68-pin QFN part table and drawing b

Página 3

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 11 of 478.1 68-Pin Part Pinout (On-Chip Debug) The 68-pin QFN part tab

Página 4

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 12 of 478.1 100-Ball VFBGA Part PinoutThe 100-ball VFBGA part is for t

Página 5

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 13 of 47Figure 8-5. CY8C24094 OCD (Not for Production)8.1 100-Ball VF

Página 6

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 14 of 47Figure 8-6. CY8C24094 OCD (Not for Production)C8 I/O I,M P2[0]

Página 7

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 15 of 478.1 100-Pin Part Pinout (On-Chip Debug)The 100-pin TQFP part i

Página 8

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 16 of 47Figure 8-7. CY8C24094 OCD (Not for Production)LEGENDA = Analog

Página 9

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 17 of 479. Register ReferenceThis section lists the registers of the C

Página 10 - CY8C24894, CY8C24994

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 18 of 479.3 Register Map Bank 0 Table: User Space Name Addr (0,Hex) Ac

Página 11

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 19 of 479.4 Register Map Bank 1 Table: Configuration Space Name Addr

Página 12

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 2 of 473. PSoC Functional OverviewThe PSoC family consists of many Mix

Página 13

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 20 of 4710. Electrical SpecificationsThis section presents the DC and

Página 14

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 21 of 4710.1 Absolute Maximum Ratings10.2 Operating TemperatureTable

Página 15

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 22 of 4710.3 DC Electrical Characteristics10.3.1 DC Chip Level Specif

Página 16

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 23 of 4710.3.3 DC Full-Speed USB SpecificationsThe following table lis

Página 17

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 24 of 4710.3.5 DC Low Power Comparator SpecificationsThe following tab

Página 18

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 25 of 4710.3.6 DC Analog Output Buffer SpecificationsThe following tab

Página 19

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 26 of 4710.3.7 DC Analog Reference SpecificationsThe following tables

Página 20

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 27 of 4710.3.8 DC Analog PSoC Block SpecificationsThe following table

Página 21

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 28 of 4710.3.9 DC POR and LVD SpecificationsThe following table lists

Página 22

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 29 of 4710.3.10 DC Programming SpecificationsThe following table lists

Página 23

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 3 of 473.1 The Analog SystemThe Analog System is composed of 6 configu

Página 24

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 30 of 4710.4 AC Electrical Characteristics10.4.1 AC Chip-Level Specif

Página 25

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 31 of 4710.0.1 AC General Purpose I/O SpecificationsThe following tabl

Página 26

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 32 of 4710.0.2 AC Operational Amplifier SpecificationsThe following ta

Página 27

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 33 of 47When bypassed by a capacitor on P2[4], the noise of the analog

Página 28

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 34 of 4710.0.1 AC Low Power Comparator SpecificationsThe following tab

Página 29

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 35 of 4710.0.3 AC External Clock SpecificationsThe following tables li

Página 30

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 36 of 4710.0.5 AC Programming SpecificationsThe following table lists

Página 31

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 37 of 4710.0.6 AC I2C SpecificationsThe following table lists guarante

Página 32

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 38 of 4711. Packaging DimensionsThis section illustrates the package s

Página 33

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 39 of 47Figure 11-2. 68-Pin (8x8 mm x 0.89 mm) QFNImportant Note For

Página 34

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 4 of 473.1 Additional System ResourcesSystem Resources, provide additi

Página 35

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 40 of 47Figure 11-4. 100-Ball (6x6 mm) VFBGAFigure 11-5. 100-Pin (14x

Página 36

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 41 of 4711.1 Thermal Impedance11.2 Solder Reflow Peak TemperatureFoll

Página 37

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 42 of 4712. Development Tool Selection12.1 Software12.1.1 PSoC Desig

Página 38

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 43 of 4712.3.2 CY3210-PSoCEval1The CY3210-PSoCEval1 kit features an ev

Página 39

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 44 of 4713. Ordering Information Note For Die sales information, conta

Página 40

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 45 of 4713.1 Ordering Code DefinitionsCY Package Type:PX = PDIP Pb-Fre

Página 41

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 46 of 4714. Document History PageDocument Title: CY8C24094, CY8C24794,

Página 42

Document Number: 38-12018 Rev. *M Revised February 10, 2009 Page 47 of 47PSoC Designer™ and Programmable System-on-Chip™ are trademarks and PSoC® is a

Página 43

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 5 of 475. Development ToolsPSoC Designer is a Microsoft® Windows-based

Página 44

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 6 of 476. Designing with PSoC DesignerThe development process for the

Página 45

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 7 of 477. Document Conventions7.1 Acronyms UsedThe following table li

Página 46

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 8 of 478. Pin InformationThis section describes, lists, and illustrate

Página 47

CY8C24094, CY8C24794CY8C24894, CY8C24994Document Number: 38-12018 Rev. *M Page 9 of 478.1 56-Pin Part Pinout (with XRES) Table 8-2. 56-Pin Part Pino

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