Cypress CY14B104M Manual do Utilizador descarregar pdf (Página 18)

PRELIMINARY

CY14B104K, CY14B104M

Document #: 001-07103 Rev. *K Page 18 of 31

Switching Waveforms

Figure 8. SRAM Read Cycle 2: CE Controlled

[3, 16, 20]

Figure 9. SRAM Write Cycle 1: WE

Controlled

[3, 19, 20, 21]

Address ValidAddress

Data Output

Output Data Valid

Standby

Active

High Impedance

BHE, BLE

HZCE

ACE

LZCE

DOE

LZOE

DBE

LZBE

HZBE

HZOE

Data Output

Data Input

Input Data Valid

High Impedance

Address ValidAddress

Previous Data

SCE

PWE

HZWE

LZWE

BHE, BLE

Notes

21. CE

or WE must be >V

during address transitions.

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Cypress CY14B104M Manual do Utilizador Página 18